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1.6T Ethernet IP

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Compare 16 IP from 3 vendors (1 - 10)
  • 1.6T Ethernet PCS IP
    • Supports all required features of the IEEE 802.3 specification and draft specifications
    • IP available in single 1.6T mode and quad channel mode supporting 4 x 400G, 2 x 800G and 1.6T
    • Designed to be used with Synopsys 1.6T MAC IP for 1.6T Ethernet Systems
    • Includes RS-FEC functions
    Block Diagram -- 1.6T Ethernet PCS IP
  • 1.6T Ethernet MAC IP
    • Supports all required features of the IEEE 802.3 specification
    • Supports IEEE-managed objects, IETF MIB-II and RMON for management applications
    • Application interface includes the Synopsys native interface 512-bit or 1024bit FIFO for more than 200G operation
    • Integration tested with Synopsys 1.6T Ethernet PCS IP and 224G Ethernet PHY IP
    Block Diagram -- 1.6T Ethernet MAC IP
  • 1.6T Ethernet PCS IP
    • Supports all required features of the IEEE 802.3 specification and draft specifications
    • IP available in single 1.6T mode and quad channel mode supporting 4 x 400G,
  • Synopsys 1.6T Ethernet MAC IP
    • Supports all required features of the IEEE 802.3 specification
    • Supports IEEE-managed objects, IETF MIB-II and RMON for management applications
  • The Synopsys 1.6T Ethernet PCS IP is based on the IEEE 802.3dj spec for 400Gbps, 800Gbps & 1.6Tbps Ethernet applications
    • The PMA service interface per lane operates with a transfer rate of 106.25Gbps per lane.
    • The PCS Client Interface implements a 1600GMII conceptually identical to the 200GMII/400GMII of 802.3 Clause 119.
    • The PCS implements Reed-Solomon Forward Error Correction (RS-FEC). The RS-FEC implements the RS(544,514) as defined in IEEE 802.3 using codeword interleaving.
    • The RS-FEC supports external statistics collection by providing a statistics vector which provides information for codewords, corrected codewords, uncorrected codewords as well as individual symbols corrected per codeword if corrections occurred. Option to integrate RS-FEC Statistics module.
  • The Synopsys 1.6T Ethernet MAC IP is based on IEEE 802.3-2018 spec for 400Gbps, 800Gbps & 1.6Tbps Ethernet applications
    • Full MAC layer and reconciliation sublayer implementation compliant with the IEEE 802.3 specification.
    • Up to four individual ports supporting full-duplex operation at 400Gbps, 800Gbps and 1600Gbps, with a maximum combined data-rate of 1600Gbps.
    • IEEE 802.3 Clause 117 compliant 400GMII PCS interface with optional PCS-driven data-rate control.
    • FIFO-based transmit application interface with simple level-based backpressure or accurate credit-based utilization.
  • 224G Ethernet PHY in TSMC (N3E)
    • Optimized for performance, power, and area
    • Includes one, two, or four full-duplex PAM-4/6 transceivers (transmit and receive functions)
    • Supports IEEE and OIF-CEI-224G standards
    • Includes auto-negotiation and link training capabilities
  • 224G Ethernet PHY for TSMC 3nm
    • Supports full-duplex 1.25 to 224Gbps data rates
    • Enables 200G, 400G, 800G, and 1.6T Ethernet
    • Ethernet interconnects for wired network infrastructure
  • 10G-1.6T Ethernet/FiberChannel/FlexO Core
    • PCS layer formed by bonded 2x 400GE PCS in PCS Layer
    • Using 32 virtual logical lanes based on 2 x 400GE PCS to reduce power in 800G operation
    Block Diagram -- 10G-1.6T Ethernet/FiberChannel/FlexO Core
  • 224G-LR SerDes PHY enables 1.6T and 800G networks
    • TSMC 3nm process
    • Supports full-duplex 1.25 to 225Gbps data rates
    • Enables 1.6T, 800G, 400G, and 200G Ethernet with a PHY + Controller solution
    Block Diagram -- 224G-LR SerDes PHY enables 1.6T and 800G networks
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