UMC 28nm HPM/HVT Logic Process 12-track generic_core library with LMINUS (C30)
Overview
UMC 28nm HPM/HVT Logic Process 12-track generic_core library with LMINUS (C30)
Technical Specifications
Foundry, Node
UMC 28nm
Maturity
Silicon proven, Formal release
UMC
Pre-Silicon:
28nm
HLP
,
28nm
HPC
,
28nm
HPM
,
28nm
LP
Related IPs
- UMC 28nm HPC/RVT Logic and Mixed-Mode Process 12-track generic_core cell library (C30)
- UMC 28nm HPM/HVT Logic Process 12-track generic_core library (C35)
- UMC 28nm HPM/HVT Logic Process 12-track generic_core library with LPLUS (C38)
- UMC 28nm HPM/RVT Logic Process 12-track generic_core library with LMINUS (C31)
- Single Port SRAM Compiler IP, UMC 65nm SP process
- CSMC13V33 process DUPIO, This library includes analog I/O cells and digital I/O cells and supports Inline DUP I/O pad.