Temperature Sensor with Digital Output (High accuracy thermal sensing for reliability and optimisation), TSMC 12FFC
Overview
A high precision low power junction temperature sensor that has been developed to be easily embedded into digital ASIC designs. The block features an exclusively digital interface and includes a power down function to reduce standby current. The temperature sensor can be instanced multiple times in a single chip. Tight thermal control of device activity is essential for performance optimization, power efficiency and long-term reliability. This In-Chip Sensing and PVT Monitoring IP is available as part of the Synopsys DesignWare® Foundation IP portfolio. It also forms the foundation of the new Synopsys Silicon Lifecycle Management (SLM) platform. SLM enables new levels of insight for both SoC providers as well as their customers to optimize operational activities at each stage of the device and system lifecycles from design to in-field.
Key Features
- Accurately measures Silicon junction temperature
- High Accuracy
- Optional 1 or 2 point calibration (if required)
- Digital interface for simplified chip integration
- Uses standard digital process layers
- Instantiate multiple temperature sensors on a single chip
- High testability for reliable operation
- Small Size
Benefits
- Enables accurate temperature measurement and tight thermal management across the die
- Avoids high transistor leakage current caused by on-chip heating
- Prevents thermal runaway and monitors temperature for safety-critical circuits
- Decreases mean time to failure through thermal analysis and the
- investigation of electromigration margins
- Allows enabling or disabling of blocks for Power Management
- Can control cooling fans for Thermal Management
Applications
- Deeply embedded thermal analysis
- Fine grained thermal management
- Thermal based software load balancing
- Opportunistic performance increases whilst staying within safe thermal limits
- Tight thermal control of device activity is essential for performance optimization, power efficiency and long term reliability.
Deliverables
- Datasheet
- GDSII
- LEF (Abstract) view
- Liberty timing files
- LVS netlist
- Verilog model
Technical Specifications
Foundry, Node
TSMC, 12nm
Maturity
Available on Request
Availability
Available
TSMC
Pre-Silicon:
12nm
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