Standard Cell (Generic) Library IP, RVT, 12 tracks, UMC 28nm HLP process
Overview
UMC 28nm HLP/RVT Logic process 12-Track Standard Generic Core Cell Library (C38).
Technical Specifications
Foundry, Node
UMC 28nm HLP
UMC
Pre-Silicon:
28nm
HLP
Related IPs
- Standard Cell PowerSlash(TM) Library IP, RVT, 12 tracks, UMC 28nm HLP process
- Standard Cell (Generic) Library IP, RVT, 12 tracks, UMC 28nm HLP process
- Standard Cell (Generic) Library IP, RVT, 12 tracks, UMC 28nm HLP process
- Standard Cell (MiniLib) Library IP, RVT, 7 tracks, UMC 28nm HLP process
- Standard Cell (MiniLib) Library IP, RVT, 7 tracks, UMC 28nm HLP process
- Standard Cell (MiniLib) Library IP, RVT, 7 tracks, UMC 28nm HLP process