SMIC 0.13um 1.2V/3.3V PCI I/O Cells Library
Overview
VeriSilicon SMIC 0.13um 1.2V/3.3V PCI I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation (SMIC) 0.13um logic 1P8M 1.2V/3.3V process. This library can take 5V tolerance and it supports both Stagger I/O pads and Inline I/O pads.
Key Features
- SMIC 0.13ìm Logic 1P8M Salicide 1.2V/3.3V process
- 1.2V core and 3.3V external interface
- Meets revision 2.2 of the PCI local bus specification
- Cell count: 6 cells
- Suits six, seven or eight metal layers of physical design
- Easy interface with VeriSilicon SMIC 0.13um process standard I/O libraries
Technical Specifications
Foundry, Node
SMIC 0.13um
Availability
VeriSilicon SMIC 0.13ìm 1.2V/3.3V PCI I/O Cells Library
SMIC
Pre-Silicon:
130nm
EEPROM
,
130nm
G
,
130nm
LL
,
130nm
LV
Related IPs
- GSMC 0.15um 1.2V/3.3V PCI I/O Cells
- VeriSilicon SMIC 0.13um 1.2V/3.3V SSTLCOMBO_02 I/O Cell Library
- CSMC 0.13um 1.2V<->3.3V Level Shifter Library, 1.2v/3.3v operating voltage
- SMIC 0.13um General Process, 1.2V/2.5V Standard Cell Library
- SMIC 0.13um High Vt Process, 1.2V/2.5V standard cell Library
- GSMC 0.15um 1.5V/3.3V PCI I/O Cells Library