Silterra 0.18um Ultra Low Leakage 7track Std Cell Library
Silterra 0.18um ULL Process 7track Std Cell Library
Overview
Key Features
- Silterra 0.18um Ultra Low Leakage Process
- Wide Variety of Cell Functions and Drive Strengths.
- Process-Specific Optimization for Ultra High-Density and Low-Power.
- Engineered for Synthesizability and Routability.
- Scan Flip-flops for Design for Testability Support.
- Clock Gating for power optimization
- More details, please go to below website to contact VeriSilicon location sales : http://www.verisilicon.com/en/contactus.asp
Technical Specifications
Maturity
Pre-Silicon
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