Low Power/Ultra Low Power Via Programmable ROM Compiler with Row/Column Redundancy Option, supports process GP/LP/LPEF/ULP/ULPEF

Overview

Specialty Memory Solutions

Technical Specifications

Short description
Low Power/Ultra Low Power Via Programmable ROM Compiler with Row/Column Redundancy Option, supports process GP/LP/LPEF/ULP/ULPEF
Vendor
Vendor Name
Foundry, Node
TSMC 55nm
Maturity
Silicon Proven
TSMC
Silicon Proven: 55nm FL , 55nm G , 55nm GP , 55nm LP , 55nm NF , 55nm ULP , 55nm ULPEF , 55nm UP
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Semiconductor IP