GSMC 0.18umOTP Single-Port/Dual-Port SRAM and Diffusion ROM Compiler

Overview

VeriSilicon GSMC 0.18um G9 3.3V Synchronous Memory Compiler optimized for Grace Semiconductor Manufacturing Corporation (GSMC) 0.18um Generic 1P3M 3.3V/5V process can flexibly generate memory blocks via a friendly GUI or shell commands.
The compiler supports a comprehensive range of word and bit lengths. While satisfying speed and power requirements, it is optimized for area efficiency.
VeriSilicon GSMC 0.18um G9 3.3V Synchronous Memory Compiler uses three layers within the blocks and supports metal 3 as the top metal. Dummy bit cells are synthesized with the intention to enhance reliability.

Key Features

  • 1P3M/1P4M Low Cost
  • All 3.3v device
  • High Density
  • High Speed
  • Size Sensitive Self-Time Delay for Fast Access
  • Automatic Power Down
  • Tri-State Output(SRAM only)
  • Write Mask Function(SRAM & Register File)

Technical Specifications

Foundry, Node
GSMC 0.18um
Maturity
Silicon Proven
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Semiconductor IP