Fully-integrated programmable clock generator IP with embedded frequency monitor

Overview

The Secure Clock Generator is a fully integrated mixed-signal IP securing the clocked system against side-channel attacks.

Key Features

  • fully integrated secure clock generator
  • programmable frequency ranging from 19 MHz to 27 MHz (customized on request)
  • frequency accuracy better than ±10% through trimming process
  • frequency monitor protecting against fault injection attacks
  • jittered clock option protecting against side-channel attacks
  • secondary clock signal generated by on-the-fly period masking
  • robust power-up, power-down and standby sequences avoiding clock glitches
  • operating junction temperature range: -40°C to 125°C
  • characteristics of a 130 nm CMOS implementation: power supply voltage range: 1.5 V ±10%; typical wake-up time shorter than 100 µs; typical operating current consumption lower than 50 µA at 25 MHz; silicon area smaller than 0.06 mm²
  • proven track record through mass production in a 130 nm CMOS process
  • silicon proven in 130 nm and 65 nm CMOS process

Benefits

  • Fully integrated
  • Programmable range
  • Accurate frequency
  • On-the-fly modulation
  • Optional jitter

Deliverables

  • GDSII stream and layer map file
  • Library Exchange Format (LEF) file
  • Circuit Description Language (CDL) netlist
  • Liberty Timing File (.lib)
  • VHDL behavioral model
  • design specification

Technical Specifications

Maturity
In production
Availability
Available
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Semiconductor IP