ECO Library IPs at TSMC 40ULPEF Process

Key Features

  • Ease-of-use, compatible to industrial EDA flow
  • Combinational cells (Inverter, Buffer, NAND, NOR, AOI/OAI, XOR/XNR)
  • Sequential cells (Scan Flip-flop, and Latch)

Technical Specifications

Foundry, Node
TSMC 40ULPEF
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Semiconductor IP