Vendor: Xilinx, Inc. Category: Arithmetic Units

Accumulator

The Accumulator IP provides LUT and single DSP48 slice accumulation implementations.

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Overview

The Accumulator IP provides LUT and single DSP48 slice accumulation implementations. The Accumulator module can implement adder-based, subtracter-based, and dynamically configurable adder/subtracter-based accumulators operating on signed or unsigned data. The Accumulator module can generate adder-based, subtracter-based and adder/subtracter-based accumulators operating on signed or unsigned data. The function can be implemented in a single DSP48 slice or LUTs (but currently not a hybrid of both). Pipelining is available for both implementations.

Key features

  • Supports fabric implementation inputs ranging from 2 to 256 bits wide
  • Supports DSP48 slice implementation with inputs ranging from 2 to 36 or 48 bits wide (varies with device family selection).
  • Optional carry output.
  • Latency configuration of manual or automatic for maximal speed performance.
  • Instantaneous Resource Estimation

Files

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Specifications

Identity

Part Number
Accumulator
Vendor
Xilinx, Inc.
Type
Silicon IP

Provider

Xilinx, Inc.
HQ: USA
Contact Xilinx, Inc.

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Frequently asked questions about Arithmetic Unit IP cores

What is Accumulator?

Accumulator is a Arithmetic Units IP core from Xilinx, Inc. listed on Semi IP Hub.

How should engineers evaluate this Arithmetic Units?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Arithmetic Units IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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