Accumulator
Overview
The Accumulator IP provides LUT and single DSP48 slice accumulation implementations. The Accumulator module can implement adder-based, subtracter-based, and dynamically configurable adder/subtracter-based accumulators operating on signed or unsigned data. The Accumulator module can generate adder-based, subtracter-based and adder/subtracter-based accumulators operating on signed or unsigned data. The function can be implemented in a single DSP48 slice or LUTs (but currently not a hybrid of both). Pipelining is available for both implementations.
Key Features
- Supports fabric implementation inputs ranging from 2 to 256 bits wide
- Supports DSP48 slice implementation with inputs ranging from 2 to 36 or 48 bits wide (varies with device family selection).
- Optional carry output.
- Latency configuration of manual or automatic for maximal speed performance.
- Instantaneous Resource Estimation