32-bit RISC core for secure applications

Overview

The CS320 is a 32-bit RISC core designed specifically for secure applications. The CS320 is a member of the C*Core TM 32-bit RISC core family. In addition to providing most of the C310 core features, the CS320 incorporates advanced techniques to enable secure functionality. It also includes a memory protection unit (MPU) integrated with the core. The MPU module provides additional security features to the CS320 core, which include flexible and powerful access protection modes, data encryption/ decryption and address scrambling, etc. It further enhances protection against unauthorized access to sensitive data by providing two fixed and eight super-user programmable memory regions. The CS320 hard-macro incorporates advanced techniques to protect the core from various forms of attack.

Key Features

  • Low power secure RISC core
  • 32-bit load/store architecture
  • Highly optimized pipeline
  • Single-cycle 32x16 multiplier
  • Fixed-length 16-bit instructions
    • Mostly single-cycle execution
    • Two-cycle branch execution
  • 16 32-bit general purpose registers
  • 13 32-bit control registers
  • C*Bus MLB bus architecture
    • Support byte/halfword/word access
    • Optional AMBA wrapper
  • Fast interrupt support
    • 16 32-bit alternate registers for fast context
  • switching
    • Vectored/auto-vectored interrupts
    • 128 interrupt/exception vectors
  • Powerful security features
    • Memory Protection Unit
    • Scrambled and optimized layout for
  • enhanced security
    • Irreversible and secure test mode
  • Extendable simulator for application software
  • development and secure debugging

Technical Specifications

Availability
Now
×
Semiconductor IP