post-quantum cryptography IP
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11
IP
from 6 vendors
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10)
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Unified Hardware IP for Post-Quantum Cryptography based on Kyber and Dilithium
- Turn-key implementations of the NIST FIPS recommended CRYSTALS post-quantum for key encapsulation (KEM) and digital signature algorithm (DSA)
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Secure-IC's Securyzr Crypto Coprocessor with integrated Post-Quantum Cryptography IPs
- Scalable architecture and crypto engines for optimal performance/resource usage
- Configurable for perfect application fit
- 100% CPU offload with low latency and high throughput
- DPA countermeasures Full software/driver support
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High Capacity Post-Quantum Cryptography Processor (PQF-HW-LAT)
- ML-KEMSpecificFunctions(FIPS 203)
- ML-DSASpecificFunctions(FIPS 204)
- SupportsCNSA2.0quantum-resistant public-key algorithms
- Softwareecosystemssupport.
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Post-Quantum Cryptography Processor (PQP-HW-COP)
- NIST FIPS-203 (ML-KEM) Kyber 512/768/1024
- NIST FIPS-204 (ML-DSA) Dilithium 44/65/87
- NIST FIPS-202 SHA3-224/256/384/512
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Post-Quantum Cryptography Processing Engine (PQP-HW-LAT)
- PQC(post-quantumcryptography) engine
- NISTSP800-56Acomplaint
- NISTFIPS186-4and186-5compliant
- ANSSIX9.142-2020compliant
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Post-Quantum Cryptography IP: Crystals Kyber - Crystals Dilithium - XMSS - LMS
- 512 and/or 768 and/or 1024-bit secret key length
- Implementation protected against Side-Channel Attacks (Key Generation and Key Decapsulation operations are sensitive):
- Hybrid hardware-software tunable solution
- Tunable in performance or power/area
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Post-Quantum Security Subsystem (PQ-HW-SUB)
- KeyEncapsulation
- Digital Signatures
- HASHAlgorithmsupportincluding
- NISTFIPS186-4and186-5compliant
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xQlave® PQC ML-KEM (Kyber)
- Small Resource Requirements
- Fast Performance
- Secure Architecture
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CRYSTALS Dilithium core for accelerating NIST FIPS 204 Module Lattice Digital Signature algorithm
Hardware core for accelerating the high-level operations specified in the NIST FIPS 204 standard.
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SHA3 core for accelerating NIST FIPS 202 Secure Hash Algorithm
- Supports variable length SHA-3 Hash Functions
- Supports Extendable Output Functions (XOF)
- Configurable architecture for achieving the required performance and silicon area
