PCIe Clock PHY IP
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287
IP
from 20 vendors
(1
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10)
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PCIe GEN6 PHY IP
- The PCIe GEN6 PHY IP achieves data rates up to 64GT/s per lane with PAM4 signaling thereby delivering reliable performance for high-speed data transfer.
- It supports advanced applications, including AI/ML, High-Performance Computing, and next-generation storage solutions.
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10G PHY for PCIe 3.0, TSMC N5 X1, North/South (vertical) poly orientation
- Supports 1.25 Gbps to 10 Gbps data rates
- Supports PCI Express 3.1, SATA 6G, SGMII
- Supports x1 to x16 macro configurations
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10G PHY for PCIe 3.0, TSMC 16FFPLL x8, North/South (vertical) poly orientation
- Supports 1.25 Gbps to 10 Gbps data rates
- Supports PCI Express 3.1, SATA 6G, SGMII
- Supports x1 to x16 macro configurations
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10G PHY for PCIe 3.0, TSMC 16FFPLL x4, North/South (vertical) poly orientation
- Supports 1.25 Gbps to 10 Gbps data rates
- Supports PCI Express 3.1, SATA 6G, SGMII
- Supports x1 to x16 macro configurations
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10G MP PHY for PCIe 3.0/USXGMII/SGMII, TSMC 12FFC x1, North/South (vertical) poly orientation
- Supports 1.25 Gbps to 10 Gbps data rates
- Supports PCI Express 3.1, SATA 6G, SGMII
- Supports x1 to x16 macro configurations
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10G PHY for PCIe 3.0, SS SF5 x2, North/South (vertical) poly orientation
- Supports 1.25 Gbps to 10 Gbps data rates
- Supports PCI Express 3.1, SATA 6G, SGMII
- Supports x1 to x16 macro configurations
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10G PHY for PCIe 3.0, SS SF5 x1, North/South (vertical) poly orientation
- Supports 1.25 Gbps to 10 Gbps data rates
- Supports PCI Express 3.1, SATA 6G, SGMII
- Supports x1 to x16 macro configurations
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PCIe Gen4 PHY, x1-lane, RC/EP, TSMC 16FFC, N/S orientation
- Fully compliant with PCI Express Base 4.0, PCI Express Base 3.1, PCI Express Base 2.1 and PCI Express Base 1.1 electrical specifications
- Compliant with PIPE4.4.1 (PCIe) specification
- Supports all power saving modes (P0, P0s, P1, P2) defined in PIPE4.4.1 specification
- Supports L1 PM Substates with CLKREQ#
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PCIe Gen4 PHY, x4-lane, RC/EP, TSMC 16FFC, N/S orientation
- Fully compliant with PCI Express Base 4.0, PCI Express Base 3.1, PCI Express Base 2.1 and PCI Express Base 1.1 electrical specifications
- Compliant with PIPE4.4.1 (PCIe) specification
- Supports all power saving modes (P0, P0s, P1, P2) defined in PIPE4.4.1 specification
- Supports L1 PM Substates with CLKREQ#
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PCIe Gen4 PHY, x1-lane, RC/EP, TSMC 12FFC, N/S orientation
- Fully compliant with PCI Express Base 4.0, PCI Express Base 3.1, PCI Express Base 2.1 and PCI Express Base 1.1 electrical specifications
- Compliant with PIPE4.4.1 (PCIe) specification
- Supports all power saving modes (P0, P0s, P1, P2) defined in PIPE4.4.1 specification
- Supports L1 PM Substates with CLKREQ#
