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MIPI A-PHY IP

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Search (12)
Compare 12 IP from 7 vendors (1 - 10)
  • MIPI A-PHY Verification IP
    • Implemented in native OpenVera, SystemVerilog, Verilog and SystemC.
    • Supported RVM, AVM, VMM, OVM, UVM and non-standard verify env.
    • Supports MIPI A-PHY specification version upto 2.0.
    • Supports single lane and dual lane, point-to-point and serial communication technology.
    Block Diagram -- MIPI A-PHY Verification IP
  • Sensor / Display MIPI A-PHY Source IP
    • The CL12911IP4000 is based on MIPI A-PHY interface specification announced in year 2020, targeting ultra-high-speed networking applications in ADAS and autonomous drive subsystems.
    • It supports applications that require long reach (up to 15 meters), error-free links, and high EMI immunity requirement.
    Block Diagram -- Sensor / Display MIPI A-PHY Source IP
  • Sensor/Display MIPI A-PHY Sink IP
    • The CL12912IP4000 is based on MIPI A-PHY interface specification announced in year 2020, targeting ultra-high-speed networking applications in ADAS and autonomous drive subsystems.
    • It supports applications that require long reach (up to 15 meters), error-free links, and high EMI immunity requirement.
    Block Diagram -- Sensor/Display MIPI A-PHY Sink IP
  • MIPI A-PHY
    • Asymmetric data link layer with point-to-point or daisy-chain topology
    • Up to 15-meter reach
    • Support 3 downlink speed gears Gear 1.0/2.0/3.0(2, 4, 8Gbps) 
    • 2 uplink speed gears (100 and 200 Mbps)
    • Ultra-low packet error rate (PER) of 10-19 for unprecedented reliability over vehicle lifetime
  • Simulation VIP for MIPI D-PHY, C-PHY and A-PHY
    • PHY Monitor
    • Built-in scoreboarding between serial/PPI interface, also monitors error signal interface
    • Reports any detected error on any lane on serial interface and is not reflected on PPI interface
    • C-PHY and D-PHY
    Block Diagram -- Simulation VIP for MIPI D-PHY, C-PHY and A-PHY
  • MIPI CSI-2 V3 RECEIVER INTERFACE IP
    • The MIPI CSI-2 (Camera Serial Interface) defines an interface between a peripheral device (camera) and host processor (application engine) for mobile applications
    • The MIPI CSI-2 provides the mobile industry a standard, robust, scalable, low-power, high-speed, cost-effective interface that supports a wide range of imaging solutions for mobile devices
    Block Diagram -- MIPI CSI-2 V3 RECEIVER INTERFACE IP
  • A-PHY VIP
    • MIPI A-PHY v1.0 is a physical layer communication protocol designed for automotive applications, including driver assistance, autonomous driving, and surround-sensor systems such as cameras and in-vehicle displays
    • With a long-reach capability of up to 15 meters, A-PHY provides an asymmetric point-to-point data link that supports one-way fast data and two-way control data transmission, along with optional power delivery, all through a single cable
  • Simulation VIP for MIPI CSI-2
    • PHY Interfaces
    • Supports D-PHY v2.5, C-PHY v2.0 and A-PHY v1.0 with both PHY interfaces: Serial (Dpdn/ABC/Uplink/downlink) and Parallel (PPI/APPI)
    • PPI Data Bus Width
    • Supports 16- and 32-bit PPI data bus width over C-PHYsm
    Block Diagram -- Simulation VIP for MIPI CSI-2
  • A-PHY v1.1 Verification IP
    • Compliant to MIPI A-PHY Specification Version 1.1.1 with APPI interface.
    • Support all C-Port, D-Port and Q-Port.
    • Support for both Profile 1 and Profile 2.
    • Supports all possible configuration for Data Lane Module at PHY layer.
    Block Diagram -- A-PHY v1.1 Verification IP
  • MIPI CSI2 Receiver Interface
    • Compliance as per MIPI-CSI-2 version3.0.
    • Compliance with C-PHY 2.0 for MIPI CSI-2 Version3.0
    • Compliance with D-PHY 2.5 for MIPI CSI-2 Version3.0.
    Block Diagram -- MIPI CSI2 Receiver Interface
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