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FFT IFFT IP

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Compare 18 IP from 10 vendors (1 - 10)
  • FFT Algorithm Accelerator
    • Support transform point sizes n = 2^m, m = 4 ~ 12
    • Support 16-bit and 32-bit fixed-point data formats
    • Support bus max transmission width 64bit
    • Support Radix-2 Decimation-In-Time (DIT) and Decimation-In-Frequency (DIF) FFT, IFFT algorithms
  • 32-512 Point Streaming FFT Core
    • Supports 32/64/128/256/512-point complex FFT and IFFT and can switch dynamically
    • Inputs and outputs data in the natural order
    • Throughput of 1 sample (In-phase I + quadrature Q) per 4 clocks; no-gap processing of the input data
    • Parameterized bit width.
    Block Diagram -- 32-512 Point Streaming FFT Core
  • FFT - Streaming Mixed-Radix Architecture
    • Complex FFT/IFFT operation, run-time configurable on a per-frame basis
    • Configurable transform sizes:
  • 32/64/128/256/512/1024/2048/4096 Point FFT Core
    • Supports 32/64/128/256/512/1024/2048/4096 point complex FFT and IFFT and up to 8192 point real-to-complex and complex-to-real FFT and IFFT and can switch dynamically. The real-to-complex and complex-to-real FFT/IFFT does not require any additional memory.
    • Built-in bit reversal. Outputs in natural order
    • Supports reading output data in any order (read address)
    • Low Latency. Can be customized to improve latency vs. gate count
  • Parallel Butterfly FFT
    • ParaCore Architect parametric-based core provides maximum adaptability and flexibility (see details on the FFT Parameters)
    • Completely proven in many real-world applications
    • Supports any radix-2 length FFT and IFFT transformations
    • Variable length option for runtime per-transform length select
  • 1024 Point FFT
    • Supports 512 and 1024-point FFT and IFFT and can switch dynamically
    • Can process up-to two 512 FFT simultaneously (well suited for MIMO application)
    • Built-in bit reversal. Outputs in Natural order
    • Supports reading output data in any order (read address)
  • 64 POINT FFT
    • Supports both FFT and IFFT
    • In built bit reversal algorithm
    • Low Latency
    • Throughput of 1 sample per clock
  • FFT Compiler
    • Wide range of points sizes: 64, 128, 256, 512, 1024, 2048, 4096, 8192, and 16384
    • Choice of high-performance (streaming I/O) and low resource (burst I/O) versions
    • Run-time variable FFT point size
    • Forward, inverse or port-configurable forward/inverse transform modes
    Block Diagram -- FFT Compiler
  • High-performance Low-memory Mixed Radix FFT
    • Real or Complex valued IFFT/FFT options
    • Per transform selection of FFT size from 8 to 32768 points
    • Per transform selection of FFT or IFFT
    • Efficient mixed radix 4/2 dragonfly for low cycle count
  • WiMAX IEEE802.16e Transceiver
    • WiMAX IEEE802.16e compliant
    • OFDMA 128, 512, 1024, 2048 FFT sizes
    • Supports BPSK, QPSK, QAM16, QAM64
    • Error Correction, Convolutional Code (CC)
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Semiconductor IP