IP Catalog > Elliptic Curve Cryptography Accelerator

Elliptic Curve Cryptography Accelerator IP

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  • High-Speed Elliptic Curve Cryptography Accelerator for ECDH and ECDSA
    • Fully digital design
    • Portable to any ASIC or FPGA technology
    • Fully standard compliant
    • Easy to integrate
    Block Diagram -- High-Speed Elliptic Curve Cryptography Accelerator for ECDH and ECDSA
  • Scalable RSA and Elliptic Curve Accelerator
    • The core implements the exponentiation operation of the RSA cryptography Q = Pk.
    • The operands for the exponentiation: k and P as well as the modulus are programmed into the memory and the calculation is started.
    • Once the operation is complete, the result Q can be read through the interface.
    Block Diagram -- Scalable RSA and Elliptic Curve Accelerator
  • Crypto Box Toolset Secure Accelerator
    • The Hybrid Crypto Box IP core is a comprehensive, high-efficiency cryptographic solution that combines RSA, ECC, AES, and SHA-2/HMAC with a built-in accelerator for post-quantum algorithms such as ML-KEM (Kyber) and ML-DSA (Dilithium). Designed for embedded systems with balanced resource constraints, it enables secure key exchange, digital signatures, authenticated encryption, and hashing, future-proofed for the quantum era.
  • Agile Post Quantum Crypto (PQC) Public Key Accelerator - NIST algorithms
    • Offloads the computationally intensive parts of public key cryptography
    • Support for ARM® AMBA® AHB™/AXI™ and synchronous RAM interfaces
    • Integer operations (512-, 768-, 1024-, 1536-, 2048-, 3072-, and 4096-bit)
    • ECC-GF(p) operations (160, 192, 224, 256, 384, 512 and 521-bit)
  • Agile ECC/RSA Public Key Accelerator with 32-bit ALU
    • Offloads the computationally intensive parts of public key cryptography
    • Support for ARM® AMBA® AHB™/AXI™ and synchronous RAM interfaces
    • Integer operations (512-, 768-, 1024-, 1536-, 2048-, 3072-, and 4096-bit)
    • ECC-GF(p) operations (160, 192, 224, 256, 384, 512 and 521-bit)
  • Agile ECC/RSA Public Key Accelerator with 128-bit ALU
    • Offloads the computationally intensive parts of public key cryptography
    • Support for ARM® AMBA® AHB™/AXI™ and synchronous RAM interfaces
    • Integer operations (512-, 768-, 1024-, 1536-, 2048-, 3072-, and 4096-bit)
    • ECC-GF(p) operations (160, 192, 224, 256, 384, 512 and 521-bit)
  • Public Key Accelerator
    • Modular exponentiation operations with up to 4096-bit modulus
    • Prime field ECC operations with up to 571-bit modulus
    • Fastest implementation is 58 kGE and 68 Op/s for 2048-bit RSA, 431 Op/s for 1024-bit RSA, 150 Op/s for 384-bit scalar multiplication
    • Smallest implementation is 33 kGE and 67 Op/s for 1024-bit RSA, 24 Op/s for 384-bit scalar multiplication
    Block Diagram -- Public Key Accelerator
  • 32-bit Public Key Accelerator
    • Offloads the computationally intensive parts of public key cryptography
    • Support for ARM® AMBA® AHB™/AXI™ and synchronous RAM interfaces
    • Integer operations (512-, 768-, 1024-, 1536-, 2048-, 3072-, and 4096-bit)
    • ECC-GF(p) operations (160, 192, 224, 256, 384, 512 and 521-bit)
  • 128-bit Public Key Accelerator
    • Offloads the computationally intensive parts of public key cryptography
    • Support for ARM® AMBA® AHB™/AXI™ and synchronous RAM interfaces
    • Integer operations (512-, 768-, 1024-, 1536-, 2048-, 3072-, and 4096-bit)
    • ECC-GF(p) operations (160, 192, 224, 256, 384, 512 and 521-bit)
  • Unified Hardware IP for Post-Quantum Cryptography based on Kyber and Dilithium
    • Turn-key implementations of the NIST FIPS recommended CRYSTALS post-quantum for key encapsulation (KEM) and digital signature algorithm (DSA)
    Block Diagram -- Unified Hardware IP for Post-Quantum Cryptography based on Kyber and Dilithium
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