DDR2 SDRAM IP

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Compare 43 IP from 17 vendors (1 - 10)
  • DDR2 SDRAM Controller - Pipelined
    • Interfaces to Industry Standard DDR2 SDRAM
    • High-Performance DDR2 533/400/333/266/200/133 operation
    • Programmable Burst Lengths of 4 or 8
    • Programmable CAS Latency of 3, 4, 5 or 6 Cycles
    Block Diagram -- DDR2 SDRAM Controller - Pipelined
  • DDR2 SDRAM Controller for UniPHY
    • Support for industry-standard DDR, DDR2, and DDR3 SDRAM devices and modules
    • Look-ahead bank management
  • DDR2 SDRAM Controller
    • Supports industrial standard Double Data Rate (DDR) and Double Date Rate2 (DDR2) SDRAM from 64Mbit to 2Gbit device sizes.
    • Page hit detection to support multiple column accesses within the same row.
    • Pipeline access enables continuous data bursting and hidden active commands, even in the case of page misses.
    • Issue precharge, active and read/write commands to multiple banks at the same time.
  • DDR2 SDRAM Controller
    • Altera Avalon® Memory-Mapped (Avalon-MM) 32 bit interface for slave management
  • DDR SDRAM Controller
    • GMII and single data rate (SDR) XGMII interfaces to 1G/10GbE (10M-10GbE) MAC, 8 bits at 125 MHz and 72 bits at 156.25 MHz respectively for data transfer
  • Video Frame Buffer
    • Asynchronous video input
    • Output video synchronized to the system clock
    • Simple user interface looks like a FIFO
    • Supports all standard and any custom video resolution
    Block Diagram -- Video Frame Buffer
  • DDR3/2 PHY - TSMC 40LP25
    • When combined with a Synopsys DDR memory or protocol controller and verification IP, Synopsys provides a complete DDR3/2 interface IP solution
    • Scalable architecture that supports the speed range from DDR2-667 up to DDR3-2133
    • Support for DDR3L (1.35V DDR3)
    • Support for DDR2 and DDR3 DIMMs
    Block Diagram -- DDR3/2 PHY - TSMC 40LP25
  • Memory Interface
    • Memory Interface generates through a Graphic User Interface the unencrypted Verilog or VHDL design files, UCF constraints, and simulation script files to simplify the memory interface design process.
    • Memory modules (DIMM) are supported for DDR3, DDR2 and DDR SDRAMs.
    • OS Support
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Semiconductor IP