DDR2 SDRAM IP
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DDR2 SDRAM Controller for UniPHY
- Support for industry-standard DDR, DDR2, and DDR3 SDRAM devices and modules
- Look-ahead bank management
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DDR2 SDRAM Controller - Pipelined
- Interfaces to Industry Standard DDR2 SDRAM
- High-Performance DDR2 533/400/333/266/200/133 operation
- Programmable Burst Lengths of 4 or 8
- Programmable CAS Latency of 3, 4, 5 or 6 Cycles
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DDR2 SDRAM Controller
- Supports industrial standard Double Data Rate (DDR) and Double Date Rate2 (DDR2) SDRAM from 64Mbit to 2Gbit device sizes.
- Page hit detection to support multiple column accesses within the same row.
- Pipeline access enables continuous data bursting and hidden active commands, even in the case of page misses.
- Issue precharge, active and read/write commands to multiple banks at the same time.
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DDR2 SDRAM Controller
- Altera Avalon® Memory-Mapped (Avalon-MM) 32 bit interface for slave management
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Complete memory system supporting any combinations of SDR SDRAM, DDR, DDR2, Mobile SDR, FCRAM, Flash, EEPROM, SRAM and NAND Flash, all in one IP core
- Comprehensive :
- Customizable :
- Supports :
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DDR2 SDRAM Controller IP
- Supports DDR2 protocol standard JESD79-2F Specification.
- Compliant with DFI-version 2.0 or higher Specification.
- Supports all the DDR2 commands as per the specs. Supports up to 16 AXI ports with data width upto 512 bits.
- Supports controllable outstanding transactions for AXI write and read channels
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DDR1 DDR2 SDRAM Memory Controller
- Memory Interface
- Supported Soc Bus Interconnect
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Performance Enhanced version of uMCTL2 supporting DDR4, DDR3, DDR2, LPDDR4, LPDDR3 and LPDDR2 for Automotive
- Select a complete multi-ported Enhanced Universal DDR Memory Controller offering 1 to 16 host ports, or join a third-party scheduler to a single-port Enhanced Universal Protocol Controller
- Support for JEDEC standard DDR2, DDR3, DDR4, LPDDR/Mobile DDR, LPDDR2, LPDDR3, and LPDDR4 SDRAMs
- Compatible with all Synopsys DDR PHYs (excluding DDR2/DDR PHYs) using DFI-compliant interfaces
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Performance Enhanced version of DDR Enhanced Memory Ctl (uMCTL2) supporting DDR4, DDR3, DDR2, LPDDR4, LPDDR3, and LPDDR2
- Select a complete multi-ported Enhanced Universal DDR Memory Controller offering 1 to 16 host ports, or join a third-party scheduler to a single-port Enhanced Universal Protocol Controller
- Support for JEDEC standard DDR2, DDR3, DDR4, LPDDR/Mobile DDR, LPDDR2, LPDDR3, and LPDDR4 SDRAMs
- Compatible with all Synopsys DDR PHYs (excluding DDR2/DDR PHYs) using DFI-compliant interfaces
