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CXL 3.0 IP

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Compare 43 IP from 13 vendors (1 - 10)
  • CXL 3.0 Controller
    • The CXL Controller IP is micro-architected with power, performance, and area optimization for high bandwidth, minimum latency, and low power applications.
    • The CXL IP supports seamless transition from FPGA prototyping to production silicon implementation.
    • Featuring native integration with SignatureIP's Coherent and Non-coherent Network-on-Chip (NoC) IPs, this controller enables robust SoC subsystems and complete platform solutions
    Block Diagram -- CXL 3.0 Controller
  • CXL 3.0 Premium Controller EP/RP/DM/SW 128-1024 bits with AMBA bridge and Advanced HPC Features (Arm CCA)
    • Supports all required features of CXL 3.1 and CXL 3.0
    • Supports all key features and performance requirements in the CXL 3.0, 2.0, 1.1 and 1.0 specifications
    • Supports all required features of the PCI Express 6.2/6.1/6.0.1 (64GT/s), 5.0 (32 GT/s), 4.0 (16 GT/s), 3.1 (8 GT/s) and PIPE (32-bit) specifications
    Block Diagram -- CXL 3.0 Premium Controller EP/RP/DM/SW 128-1024 bits with AMBA bridge and Advanced HPC Features (Arm CCA)
  • CXL 3.0 Premium Controller EP/RP/DM 1024b/512b/256b/128b with AMBA bridge for CXL.io and LTI & MSI Interfaces
    • Supports all required features of CXL 3.1 and CXL 3.0
    • Supports all key features and performance requirements in the CXL 3.0, 2.0, 1.1 and 1.0 specifications
    • Supports all required features of the PCI Express 6.2/6.1/6.0.1 (64GT/s), 5.0 (32 GT/s), 4.0 (16 GT/s), 3.1 (8 GT/s) and PIPE (32-bit) specifications
    Block Diagram -- CXL 3.0 Premium Controller EP/RP/DM 1024b/512b/256b/128b with AMBA bridge for CXL.io and LTI & MSI Interfaces
  • CXL 3.0 Premium Controller EP/RP/DM 1024b/512b/256b/128b with AMBA bridge for CXL.io
    • Supports all required features of CXL 3.1 and CXL 3.0
    • Supports all key features and performance requirements in the CXL 3.0, 2.0, 1.1 and 1.0 specifications
    • Supports all required features of the PCI Express 6.2/6.1/6.0.1 (64GT/s), 5.0 (32 GT/s), 4.0 (16 GT/s), 3.1 (8 GT/s) and PIPE (32-bit) specifications
    Block Diagram -- CXL 3.0 Premium Controller EP/RP/DM 1024b/512b/256b/128b with AMBA bridge for CXL.io
  • CXL 3.0 Premium Controller EP/RP/DM 1024b/512b/256b/128b
    • Supports all required features of CXL 3.1 and CXL 3.0
    • Supports all key features and performance requirements in the CXL 3.0, 2.0, 1.1 and 1.0 specifications
    • Supports all required features of the PCI Express 6.2/6.1/6.0.1 (64GT/s), 5.0 (32 GT/s), 4.0 (16 GT/s), 3.1 (8 GT/s) and PIPE (32-bit) specifications
    Block Diagram -- CXL 3.0 Premium Controller EP/RP/DM 1024b/512b/256b/128b
  • Adds security Interfaces, features to CXL 3.0 Premium controllers
    • Supports all required features of CXL 3.1 and CXL 3.0
    • Supports all key features and performance requirements in the CXL 3.0, 2.0, 1.1 and 1.0 specifications
    • Supports all required features of the PCI Express 6.2/6.1/6.0.1 (64GT/s), 5.0 (32 GT/s), 4.0 (16 GT/s), 3.1 (8 GT/s) and PIPE (32-bit) specifications
    Block Diagram -- Adds security Interfaces, features to CXL 3.0 Premium controllers
  • PCIe 6.0 / CXL 3.0 PHY & Controller
    • Innosilicon’s PCIe 6.0 and CXL 3.0 IP solutions combine high-performance controllers and PHYs, fully compliant with PCIe 6.0, CXL 3.0, and PIPE specifications
    • These solutions deliver exceptional performance, low latency, power efficiency, and unparalleled flexibility, making them ideal for enterprise computing, data centers, cloud servers, AI and machine learning, storage expansion, and high-speed interconnect applications
    Block Diagram -- PCIe 6.0 / CXL 3.0 PHY & Controller
  • Supports all key features and performance requirements in the CXL 3.0, 2.0, 1.1 and 1.0 specifications
    • Supports key required features of the CXL 3.0 specification and full backwards compatibility with CXL 2.0, 1.0 and 1.1
    • Supports PCIe 6.0 mode with 64 GT/s and x16 link width
    • CXL license includes PCIe 6.0 functionality and fallback mode
    • Customers using CXL do not need an additional PCIe 6.0 license
  • CXL 3.0 Integrity and Data Encryption Security Module
    • Support for PCIe 6.0/6.1/6.2 IDE specification for CXL.io
    • Support for CXL 3.0 IDE specification for CXL.cache/mem
    • Support all required features of CXL 3.0 and CXL 3.1
    • High-performance AES-GCM-based packet encryption, decryption, authentication
    Block Diagram -- CXL 3.0 Integrity and Data Encryption Security Module
  • CXL 3.0 IP
    • Supports CXL 2.0, 1.1, and 1.0 specifications and is compliant with the PCIe 6.0 and offers backward compatibility with PCIe 5.0, 4.0, 3.1, 2.0, and 1.1
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