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2D Graphics Accelerator IP

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Compare 8 IP from 4 vendors (1 - 8)
  • 2D Graphics Hardware Accelerator (AHB Bus)
    • Generates bitmaps from graphics instructions as well as combining existing bitmaps on and off-screen using one of 256 Raster Operations. A Raster Operation (ROP) is a bitwise Boolean operation (such as AND, OR, XOR, NOT) which lay the foundation for power hardware graphics primitive operations
    • Generates characters from compressed bitmaps using its FONT Bitmap Color Expansion Unit
    • Performs Alpha Blend operations of bitmaps with its Alpha Blend unit
    • Draws lines, polygons, circles using its hardware efficient & pixel accurate Bresenham Algorithm Line Drawing Unit
    Block Diagram -- 2D Graphics Hardware Accelerator (AHB Bus)
  • 2D Graphics Hardware Accelerator (AXI Bus)
    • Generates bitmaps from graphics instructions as well as combining existing bitmaps on and off-screen using one of 256 Raster Operations. A Raster Operation (ROP) is a bitwise Boolean operation (such as AND, OR, XOR, NOT) which lay the foundation for power hardware graphics primitive operations
    • Generates characters from compressed bitmaps using its FONT Bitmap Color Expansion Unit
    • Performs Alpha Blend operations of bitmaps with its Alpha Blend unit
    • Draws lines, polygons, circles using its hardware efficient & pixel accurate Bresenham Algorithm Line Drawing Unit
    Block Diagram -- 2D Graphics Hardware Accelerator (AXI Bus)
  • 2D Graphics Hardware Accelerator (AXI4 Bus)
    •  Generates bitmaps from graphics instructions as well as combining existing  bitmaps on and off-screen using one of 256 Raster Operations. A Raster Operation (ROP) is a bitwise Boolean operation (such as AND, OR, XOR, NOT) which lay the foundation for power hardware graphics primitive operations  
    •  Generates characters from compressed bitmaps using its FONT Bitmap Color Expansion Unit  
    •  Performs Alpha Blend operations of bitmaps with its Alpha Blend unit  
    •  Draws lines, polygons, circles using its hardware efficient & pixel accurate Bresenham Algorithm Line Drawing Unit  
    Block Diagram -- 2D Graphics Hardware Accelerator (AXI4 Bus)
  • 2D Vector Graphics Accelerator / GPU (Graphics Processing Unit)
    • Vertically integrated HW + SW solution
    • Monolithique HW building block, open to any system integration. Can be associated with any companion IP:
    • 2 hardware versions:
    • Software ported on numerous processors and OS
  • 2D/3D Vector Graphics Accelerator / GPU (Graphics Processing Unit)
    • D/AVE HD is an evolution in the D/AVE family supporting high quality 2D rendering and basic 3D rendering for displays up to 4K x 4K. With its high customizability D/AVE HD targets modern graphics applications in the Industrial, Medical, Military, Avionics, Automotive and Consumer markets. D/AVE HD is designed to be fast with powerful functionality and at the same time optimized regarding size and footprint. Its footprint optimized variants are especially suitable for low-power wearable products.
  • Bitmap 2.5D Graphics Accelerator
    • Supports fast graphics operations with bitmaps
    • 2.5D option enables perspective correct texture rendering in 3D
    • Solid fill - Rectangle or Triangle rendering with any color
    • Fully embedded into Xilinx® XPS and the EDK
  • High-performance and low-power 2D vector graphics IP core
    • K3000 is an OpenVG 1.1 compliant 2D vector graphics IP core that achieves the industry’s highest-level PPA (Power / Performance / Area), realizing smooth 2D vector drawing in combination with Qt and various font engines compliant with OpenVG 1.1.
  • Bit Block Transfer 2D video accelerator
    • Supported 16 different ROP2 operations
    • Contiguous and Array image addressing modes
    • Color keyed transparency
    • Color Expansion for Font acceleration
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Semiconductor IP