Synopsys Inter-Integrated Circuit (I2C) I/O library is used for two wire interfaces to connect low-speed devices like EEPROM, A/D, and D/A converters and microcontrollers on the same bus. It is designed for higher I/O voltage supply with support for low core voltage and includes fail-safe and fail-tolerance options.
The following operating modes are supported:
Standard Mode: 100 kHz
Fast Mode: 400 kHz
Fast-Plus Mode: 1 MHz
High-Speed Mode: 3.4 MHz
TSMC 6nm (6FF) 3.3V SMBUS (I2C) IO
Overview
Key Features
- Input Schmitt trigger
- Compliance with I2C-bus specification and User Manual–April4, 2014, with I2C operating modes
- Filter of 50 ns for Spike rejection
- Automotive G1/G2 supported, ASIL-B certified
- Silicon validated IP
- ESD: 2KV HBM, 500V(up to 7A) CDM, Latchup: +/-100mA @ 150C
- Designed to support multiple metal stack options
- Support for flip-chip & wirebond packaging
Technical Specifications
Foundry, Node
TSMC 6nm - FF
Maturity
Available on request
Availability
Available
TSMC
Pre-Silicon:
6nm
Related IPs
- TSMC 7nm (7FF) 3.3V SMBUS (I2C) IO
- 28nm Wirebond IO library with dynamically switchable 1.8V/ 3.3V GPIO, 5V I2C open-drain, 1.8V & 3.3V analog, OTP program cell, and HDMI & LVDS protection macros - featured across a variety of metal stack and pad configuration options
- Open-drain I2C and SMBUS, DDC, CEC & HPD IO offerings
- 1.8V I2C (CDM5A/7A-ESD) - TSMC 6nm 6FF
- TSMC 6nm (6FF) 3.3V GPIO
- IO I2C 3.3V in GF (22nm)