SMIC 65nm Low Leakage Process 24Bit Stereo Sigma-Delta ADC/DAC
Overview
The S65LLV25_CODEC_04 integrates: 2-channel 24bit sigma-delta ADC, 2-channel 24bit sigma-delta DAC with headphone driver amplifier, and audio PLL to support a wide range of sample rates.
Key Features
- 2-wire Serial Control Interface(I2C)
- Master Clock is 256fs
- Sampling Rates
- --8kHz, 11.025kHz, 12kHz, 16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, 48kHz and 96kHz
- Power Supply
- --1.2V Core Digital Supply typ. (1.02V-1.32V)
- --2.5V Pad and Analog Supply typ. (2.25V-2.75V)
- Stereo Line Input and Mono Microphone Input
- Stereo/Mono Mode
- Internal PLL as the Audio CODEC Master Clock Generator
- 32Ohm Headphone Drivers
- 16Ohm Earphone Driver
Technical Specifications
Foundry, Node
SMIC 65nm
SMIC
Pre-Silicon:
65nm
LL
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