SMIC 0.18um High Density Standard Cell Library
Key Features
- SMIC 0.18um Logic 1P6M Salicide 1.8V/3.3V Process.
- Wide Variety of Cell Functions and Drive Strengths.
- Process-Specific Optimization for High-Density, High-Speed, and Low-Power.
- Engineered for Synthesizability and Routability.
- Scan Flip-flops for Design for Testability Support.
Technical Specifications
Foundry, Node
SMIC 0.18um
Maturity
Silicon Proven
Availability
Now
SMIC
Pre-Silicon:
180nm
EEPROM
,
180nm
G
,
180nm
LL
Related IPs
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- SMIC 0.13um Low Leakage high density RVT_x005F_x000D_ Logic standard cell library.
- SMIC 0.18um 7 track High Density Standard Cell Library,1.8v operating voltage
- CSMC 0.13um 9track Standard Cell Library, 1.2v operating voltage
- CSMC 0.13um 3.3V Standard Cell Library, 3.3v operating voltage
- CSMC 0.13um Low Power 9track Standard Cell Library, 1.2v operating voltage