Scan Ring Linker enables multiple 1149.1 scan rings
Key Features
- High-Speed 1149.1 routing
- Better signal integrity for TCK/TMS signals
- SRL provides superior distribution of TCK, TMS and TRST signals permitting high-speed test operation greater than 40Mbs/sec. PCB engineering is also reduced as SRL eliminates complex test signal routing.
- Reduces part costs
- SRL can be deployed as a single IC on a PCB to reduce the need for buffers and logic level translators. SRL permits devices in secondary scan chains to have their IO pins configured at different voltage levels. A single SRL device controls each scan chain regardless of their voltage.
- Flexible implementation
- SRL simplifies design with plug-and-play IP that is easily embedded into a CPLD, FPGA or ASIC.
- High fault coverage on difficult to test signals
- SRL enables high fault coverage with pin level diagnostics for 1149.1 test signals -- TCK, TMS, TDI, TDO. Each TCK, TMS, TDI and TDO pin has a boundary-scan cell that can be used to test for shorts and stuck-at faults.
Technical Specifications
Availability
NOW – ASIC Q203
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