RapidIO, Gen 2, 5G Baud, x1 and x4
Overview
The RapidIO® standard was adopted by a significant portion of the wireless industry as a high-speed interconnect and is typically used between digital signal processors and between the control plane processors and memory. RapidIO is also gaining acceptance as a backplane interconnect due to its adoption of widely used standards for the electrical characteristics of the physical media attachment (PMA) such as XAUI or CEI for up to 6.25 Gbaud data rate.
Benefits
- SOPC Builder Ready: Yes
- Qsys Compliant: Yes
Technical Specifications
Related IPs
- LogiCORE IP Serial RapidIO Gen 2
- PCI Express Gen 1/Gen 2 Phy
- eUSB 3.1 Gen 2 Device Controller - Software Enumeration, FIFO Interface
- PCI Express x1, x4 Root Complex Lite IP Core
- RapidIO II 1x/2x/4x at 5G/6.25G supporting 2.2 spec
- Ethernet TSN Advanced Switch 10M/100M/1G/10G/25G for 5G/ORAN and other applications