PCI Compiler, 64-bit Master/Target

Overview

Altera's PCI Compiler provides a complete, easy-to-use solution for implementing a PCI interface with Altera devices. The PCI Compiler contains the Altera pci_mt64, pci_t64, pci_mt32, and pci_t32 MegaCore functions and supports both SOPC Builder and MegaWizard® Plug-In Manager design flows. The SOPC Builder design flow allows you to quickly and easily implement a PCI interface into your design. Whether your top priority is high bandwidth, high speed, or a combination of features, you can use the PCI Compiler to meet your system requirements.

Key Features

  • Contains 32-bit PCI master/target, 32-bit PCI target, 64-bit PCI master/target, 64-bit PCI target MegaCore® functions
    • Fully compliant with the timing and functional requirements of the PCI Special Interest Group (PCI SIG) PCI Local Bus Specification, Revision 3.0
    • Extensively tested in hardware
  • Easy SOPC Builder-ready integration using the general-purpose, full-featured bridge
  • Intellectual property (IP) functional simulation models provide cycle-accurate behavioral simulations in industry-standard Verilog HDL and VHDL simulation tools
  • Open-source PCI testbench provides flexible PCI bus functional models to verify Altera® PCI MegaCore function-based applications in industry-standard Verilog HDL and VHDL simulation tools
  • Reference designs for popular functionality implemented on the local side of the PCI MegaCore functions, including direct memory access (DMA) engines, datapath FIFO architectures, and SDRAM interfaces

Technical Specifications

Maturity
SOPC Builder Ready, I-Tested
Availability
Now
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Semiconductor IP