2nd order IIR filter sometimes referred to as a 'bi-quad'. Internally, it has a fully pipelined architecture permitting the highest possible sample rates for IIR filtering.
The SOS block is modular allowing any number of SOS blocks to be joined in series to implement higher order IIR filters.
IIR Filter Second-Order-Section
Overview
Key Features
- Fully pipelined architecture
- Small implementation size (6 H/W multipliers)
- Simple to cascade in series for higher orders
- 16-bit signed input and output samples
- 16-bit fixed-point coefficients and scaling factor
- Output saturation and overflow detection
- SOS coefficient matrix maps directly to filter coefficients
- Matlab®, FDAtool and Simulink® compatible
Benefits
- Technology independent soft IP Core
- Suitable for FPGA, SoC and ASIC
- Supplied as human-readable source code
- One-time license fee with unlimited use
- Field tested and market proven
- Any custom modification on request
Block Diagram
Deliverables
- VHDL source-code (or Verilog on request)
- Simulation test bench
- Examples and scripts
- Full pdf datasheet
- One-to-one technical support
- One years warranty and maintenance
Technical Specifications
Foundry, Node
All
Availability
Immediate