High Performance / Low Power Microcontroller Core

Key Features

• 8-Bit Synthesizeable Microcontroller Core
• Opcode Equivalent to Industry Standard 80251
• Fully Static, Microcode Free Design
• Pipelined Design - the execution unit runs independent from the instruction fetch unit
• independent programmable Wait State Generators for ROM access and RAM access
• 24 Bit linear addressing
• up to 16MB memory address space
• 64KB Stack space
• Up to 512 Special Function Registers (SFR)
• Idle, Power Down Mode
• Up to 15 Interrupt Sources in up to four Priority Levels
• Efficent Instruction Set for code written in C
• 8, 16 and 32 Bit Arithmetic and Logic Instructions
• Registers are accessible as Byte, Word and Double
• ~8300 gate equivalents
• Core size ~0.2mm² @ 0.25µm
• 200MHz clock freq. @ 0.25µm
• Power consumption 0.16 mW / MHz

Deliverables

• Technology Independent Implementation (Verilog Source Code)
• Verilog Simulation Model
• Verilog 80251 Test Suite
• Synthesis Scripts
• Design Support, Netlist Synthesis Service, Layout Service and Consulting available

Technical Specifications