GSMC 0.25um Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Diffusion ROM Compiler

Overview

VeriSilicon GSMC 0.25um High-Speed Synchronous Memory Compiler optimized for Grace Semiconductor Manufacturing Corporation (GSMC) 0.25um Logic 1P5M Salicide 2.5/3.3V process can flexibly generate memory blocks via a friendly GUI or shell commands.
The compiler supports a comprehensive range of word and bit lengths. While satisfying speed and power requirements, it is optimized for area efficiency.
VeriSilicon GSMC Synchronous Memory Compiler uses four layers within the blocks and supports metal 4, 5 or 6 as the top metal. Dummy bit cells are synthesized with the intention to enhance reliability

Key Features

  • High Density
  • High Speed
  • Size Sensitive Self-Time Delay for Fast Access
  • Automatic Power Down
  • Tri-State Output(SRAM only)
  • Write Mask Function(SRAM & Register File)

Technical Specifications

Foundry, Node
GSMC 0.25um
Maturity
Silicon proven
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Semiconductor IP