GSMC 0.13μm Low Power Process VCC Detector
Overview
This IP contains two Voltage Detector (VDT) circuits and a Power-On-Reset (POR) circuit. The voltage detectors monitor the supply voltage of Bus Supplies VDDQIN and VDDNIN, and the Power-On-Reset circuit generates three reset signals, SVDB, PORB and LVDB, during the power-up and power-down courses.
Key Features
- Process: GSMC 0.13μm Low Power 1.5V/3.3V 1P6M process
- 1.5V and 3.3V power supplies
- Dual Input Supply Monitors (1.5V and 3.3V)
- Operating Junction Temperature: -400C to 1250C
- 1.5V output for SVDB, PORB, LVDB, VQSEL and VNSEL
- 3.3V output for RST
- Low Quiescent Current: 59μA at maximum from all supplies
- Contains two 3V versus 1.8V Bus Voltage Detectors
- Trimming provided for trigger points
Technical Specifications
Foundry, Node
GSMC 0.13um
Maturity
Pre-silicon