DLL (All Digital) IP, Input: 333MHz - 800MHz, Output: 333MHz - 800MHz, UMC 55nm LP process
Overview
Input 333M-800MHz, output 333M-800MHz, all digital DLL with one-channel DQS delay range, UMC 55nm LP/RVT Low-K Logic process.
Technical Specifications
Foundry, Node
UMC 55nm LP
UMC
Pre-Silicon:
55nm
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