Discrete Cosine Transform

Overview

IP-ALDCT soft core is the unit to perform the Discrete Cosine Transform (DCT). It performs two-dimensional 8 by 8 point DCT for the period of 64 clock cycles in pipelined mode.

Key Features

  • up to 108 MHz sampling frequency, 64-cycle calculation period,
  • approximately 950 CLBs,
  • 8-bit input data,
  • 9-bit coefficients,
  • 12 %96 or 16-bit results,
  • pipelined mode,
  • structure optimized for Xilinx XC4000, Virtex , Spartan FPGA devices.

Technical Specifications

Foundry, Node
structure optimized for Xilinx XC4000, Virtex , Spartan FPGA devices
Availability
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Semiconductor IP