The Differential Output Driver macros provide a low noise, high performance differential output clock. The output driver design implements a push-pull differential driver which provides a source driver resistance from 33 to 55 ohms.
The output driver is implemented in Analog Bits’ proprietary architecture that uses core devices only. There is only one power supply so there are no power-up/power-down sequence restrictions.
Differential Output Buffer Operational Range Description Symbol Min Typ Max Units Input Frequency FCLK 5 100 2000 MHz Input Duty Cycle tDI 40 60 % Output Duty Cycle TDO 45 55 % Driver Series Resistor (Single Ended) RS 33 55 Ohm Output Slew Rate Trf 4 16 V/ns Output Crossing Voltage VCROSS 0.25 0.55 V Output Variation of VCROSS over all rising clock VCROSS mV 140 edges DELTA Output Voltage High (single ended unterminated) VHIGH 0.935 V Output to Output Pad Skew Tskew -50 50 ps Output Slew Rate Matching ΔTrf 20 % Total Power @ 600MHz (terminated) IDD 6.82 8.57 mW Total Power @ 600MHz (unterminated) IDD 3.22 4.44 mW Operational Voltage – Process nominal (Analog) VDDA 0.675 0.75 0.825 V Operational Voltage – Overdrive (Analog) VDDA 0.765 0.85 0.935 V Operational Temperature TOP -40 25 125 C