The ADC is a high speed SAR-based analog-to-digital converter specified to operate from a nominal 1.2V analog supply and 1.2V digital supply in differential mode application and an additional 3.3V analog supply in single ended mode application. The ADC features an excellent dynamic performance.
This release is in 55nm 3.3V/1.2V CMOS logic process suitable for 1P6M and 1P7M metal options.
12-bit 50/100MSPS SAR A/D Converter in 55nm LL
Overview
Key Features
- 55nm LL CMOS logic process.
- 3.3V/1.2V power supply required.
- 12-bit resolution high-speed SAR analog-to-digital converter. Sample rate up to 50MSPS .
- Only 1X or 2X system sample clock is used due to asynchronous timing logic .
- Maximum differential input of 1.5Vppd.Maximum single ended input of Power consumption of 2.5mW with external reference generator @ 50MSPS operation.
- Core layout area of 0.115mm2 (340um x 337um) with on-chip de-coupling capacitor. Custom-designed capacitors for perfect matching performance.
Block Diagram
Technical Specifications
Foundry, Node
55nm LL