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Concatenated IP

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Compare 11 Concatenated IP from 2 vendors (1 - 10)
  • DVB-RCS2 Modulator
    • Compliant with DVB-RCS2
    • Support for Pi/2-BPSK, QPSK, 8-PSK, and 16-QAM
    • Support for all linear burst modulation waveforms specified in Annex A
    • Output baseband-filtered and gain adjusted samples
    Block Diagram -- DVB-RCS2 Modulator
  • DOCSIS 3.1 LDPC Decoder (PLC / NCP / Data)
    • Soft-Decision Demapper, Derandomizer, Deinterleaver, Depuncturer, and LDPC Decoder are included
    • Support for 4k and 8K FFT sizes
    • Support for 16-QAM modulation
    Block Diagram -- DOCSIS 3.1 LDPC Decoder (PLC / NCP / Data)
  • DVB-GSE Encapsulator and Decapsulator
    • Compliant with ETSI TS 102 606-1 V1.2.1 (Annex D, DVB-GSE Lite)
    • Support for multi-protocol encapsulation (IPv4, IPv6, MPEG, Ethernet, etc.)
    Block Diagram -- DVB-GSE Encapsulator and Decapsulator
  • DVB-S2X Wideband BCH and LDPC Decoder
    • Compliant with DVB-S2 and DVB-S2X
    • Support for decoding of BBFRAMEs
    • Support for ACM, CCM, and VCM
    Block Diagram -- DVB-S2X Wideband BCH and LDPC Decoder
  • DVB-S2X Wideband Modulator
    • Compliant with DVB-S2 and DVB-S2X
    • Supports ACM, CCM, and VCM modes
    • Support for short and normal frames (16,200 bits and 64,800 bits)
    • Support for QPSK to 256-APSK, VLSNR modes on request
    Block Diagram -- DVB-S2X Wideband Modulator
  • DVB-S2X Wideband Demodulator
    • Compliant with ETSI EN 302 307-1 V1.4.1 (2014-11) (DVB-S2) and ETSI EN 302 307-2 V1.1.1 (2014-10) (DVB-S2X).
    • Supports CCM, ACM and VCM modes
    • Support for QPSK up to 256-APSK
    • Support for short blocks (16200 bits) and long blocks (64800 bits)
    Block Diagram -- DVB-S2X Wideband Demodulator
  • DVB-S2X LDPC/BCH Decoder
    • Compliant with DVB-S2 and DVB-S2X
    • Support for decoding of BBFRAMEs
    • Support for ACM, CCM, and VCM
    • Support for very low SNR modes (VLSNR) with SNRs below -9 dB
    Block Diagram -- DVB-S2X LDPC/BCH Decoder
  • Wideband DDC
    • Contains Numerical Controlled Oscillators, IF mixers, decimator, and halfband filters.
    • High input throughput of up to 2.4 Gsps.
    • Supported signal bandwidth of up to 600 MHz.
    • Tunable IF frequency from 10 to 700 MHz with a precision of at least 2 Hz.
  • DVB-S2 BCH and LDPC Encoder and Decoder
    • Compliant with ETSI 302 307 V1.2.1 (2009-08) (DVB-S2).
    • Support for short blocks (16200 bits) and long blocks (64800 bits).
    • Support for all modulation schemes (QPSK, 8-PSK, 16-APSK, 32-APSK).
    • Support for all interleaving schemes of all modulation schemes.
  • 10G I.3 BCH Encoder/Decoder for ITU G.975.1
    • Fully synchronous design, using single clock
    • Fully synthesizable drop-in module for FPGAs
    • Optimized for high performance and low resources
    • Low implementation loss
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