GSMC 0.18um 1.8V/3.3V DUP I/O Library
Overview
VeriSilicon GSMC 0.18um 1.8V/3.3V DUP I/O Library developed by VeriSilicon is optimized for Grace Semiconductor Manufacturing Corporation (GSMC) 0.18um Logic 1P5M Salicide 1.8/3.3V process. This library supports Device Under Pad (DUP). It can take 5V tolerance and work with configurable and variable driving strength between 2mA - 24mA.
Key Features
- GSMC 0.18um Logic 1P5M Salicide 1.8V/3.3V process
- Low area and low cost design using DUP technique
- 3.3V IO, 1.8V core, 5V tolerant
- Configurable output driving capability with different slew rate
- Supports configurable pull up and pull down resistor
- Supports both CMOS input and Schmitt input with LVTTL compatible
- Both inline and staggered compatible IO pads
- Suitable for five metal layers of physical design
- Provides 2Mhz ~ 27Mhz OSC IO cell
- Competitive pad pitch and height
Technical Specifications
Foundry, Node
GSMC 0.18um
Maturity
GDS Ready
Availability
Now