When FPGAs meet supercomputing
I’m always grateful to Michael Feldman (no, not that one) at HPCWire for being perhaps the only editor keeping track of the use of FPGAs in high-performance computing. There was a brief period of time in the mid- to late-90s when supercomputer specialists were waxing poetic on board-level upgrades utilizing FPGAs, but that seemed to wane as some of the turn-of-the-century “reconfigurability” specialists went out of business. Granted, there are some newcomers like Convey Computer (spun from the bones of Convex) who are using FPGAs, but it’s still a relatively sparse field.
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Related Semiconductor IP
- Temperature Glitch Detector
- Clock Attack Monitor
- SoC Security Platform / Hardware Root of Trust
- SPI to AHB-Lite Bridge
- Octal SPI Master/Slave Controller
Related Blogs
- Open ARM-wrestling in FPGAs
- Why FPGA startups keep failing
- Over-interpreting the extended ARM
- Lattice sticks with open RISC