LVDS Receiver (Vcc=3.3V,Vcore=1.8V, Freq=800Mbps,Vin=200mV, Long Specification)

Key Features

• Using the 0.18um CMOS technology
• Meets or exceeds the requirements of ANSI TIA/EIA-644 Standard
• Operate with dual power (3.3V / 1.8V)
• Low power dissipation 20mW at 400MHz
• Typical differential propagation skew of 50ps
• Maximum propagation delay of 1ns
• Power down mode

Technical Specifications