Crypto Accelerator IP
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366
Crypto Accelerator IP
from 68 vendors
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RT-650 DPA-Resistant Hardware Root of Trust Security Processor for Govt/Aero/Defense FIPS-140
- Secure co-processor
- Main processor agnostic
- Standard secure applications
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AES-ECB-CBC-CFB-CTR-GCM 1 Billion Trace DPA & Fault Injection Resistant Crypto Accelerator
- Quicken time-to-market using precertified DPA Countermeasures
- Highly secure cryptographic engine primitives
- Extensive validation using the Test Vector Leakage Assessment (TVLA) methodology (revealing no leakage beyond 100 million traces)
- Cores protected against univariate first- and second-order side-channel attacks beyond 1 billion operations
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RT-140 Compact Root of Trust for IoT, IIoT and cloud-connected devices, sensors, gateways
- Secure Boot assist to host CPU(s) and protection of key material
- Manages secure Firmware upgrade for Host CPU
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RT-120 Compact Root of Trust for IoT and IIoT, sensors and gateways
- Side channel attack resistant
- Technology and node independent
- Superior cryptographic protection
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RT-645 Embedded Hardware Security Module (HSM) for Automotive ASIL-D
- Custom-designed 32-bit RISC-V secure processor
- Security model include hierarchical privilege model, secure key management policy, hardware-enforced isolation/access control/protection, error management policy
- Standard hardware cryptographic accelerators, including AES (all modes), HMAC, SHA-2 (all modes), RSA up to 4096 bits, ECC up to 521 bits, a NIST-compliant Random Bit Generator, AXI Multi Issue Out-of-Order, and Fast DMA capability. Additional algorithms such as Whirlpool (SHE), SHA-1 (legacy), AES-CMAC, SHA-3, Poly1305, ChaCha and OSCCA SM2-3-4 are available
- Multi-layered security model protects all core componentsagainst a wide range of attacks
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RT-640 Embedded Hardware Security Module (HSM) for Automotive ASIL-B
- Custom-designed 32-bit RISC-V secure processor
- Security model include hierarchical privilege model, secure key management policy, hardware-enforced isolation/access control/protection, error management policy
- Standard hardware cryptographic accelerators, including AES (all modes), HMAC, SHA-2 (all modes), RSA up to 4096 bits, ECC up to 521 bits, a NIST-compliant Random Bit Generator, AXI Multi Issue Out-of-Order, and Fast DMA capability. Additional algorithms such as Whirlpool (SHE), SHA-1 (legacy), AES-CMAC, SHA-3, Poly1305, ChaCha and OSCCA SM2-3-4 are available
- Multi-layered security model protects all core components against a wide range of attacks
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RT-630-FPGA Hardware Root of Trust Security Processor for Cloud/AI/ML SoC FIPS-140
- Superior Security
- Enhanced Flexibility
- Security Models
- Cryptographic Accelerators
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RT-660-FPGA DPA-Resistant Hardware Root-of-Trust Security Processor for Govt/Aero/Defense FIPS-140
- Superior Security
- Enhanced Flexibility
- Security Models
- Cryptographic Accelerators
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Whirlpool Crypto Accelerator
- Quicken time-to-market using precertified DPA Countermeasures
- Highly secure cryptographic engine primitives
- Extensive validation using the Test Vector Leakage Assessment (TVLA) methodology (revealing no leakage beyond 100 million traces)
- Cores protected against univariate first- and second-order side-channel attacks beyond 1 billion operations
-
RT-660 DPA & Fault Injection Resistant Hardware Root of Trust Security Processor for Govt/Aero/Defense FIPS-140
- Superior Security
- Enhanced Flexibility
- Security Models
- Cryptographic Accelerators
