JESD204B Controller

Overview

JESD204B is a standardized serial interface for communication between logic devices (ASIC or FPGA) and converters (ADC or DAC). Innosilicon’s JESD204B Core provides high interoperability between devices, with serial data rate up to 12.5Gbps per lane. Featuring multi-converter alignment and multi-channel support, it is designed to improve power efficiency and simplify PCB routing.

Key Features

Supports for serial data rates up to 12.5Gbps
Supports Subclass 0, 1 and 2
Supports 1-24 lanes
Supports 1-32 converters
Supports 8-32 converter resolution
Supports configuration via standard CPU interface
Supports HD-mode
Supports user-enabled scrambling
Supports 8b/10b encoding/decoding
Generates initial lane alignment sequence
Supports SCAN mode

Benefits

As with all Innosilicon IP, the focus is on silicon proven, fully certified solutions providing:
Small size
Low power
High ATE coverage
Simple integration
Flexible customization

Deliverables

Databook
Encrypted simulation model
Netlist
SDC files

Technical Specifications

Foundry, Node

GF 22nm, SMIC 28nm, TSMC 28nm

Maturity

Silicon proven and validated

GLOBALFOUNDRIES

In Production: 22nm
Pre-Silicon: 28nm SLP
Silicon Proven: 22nm

SMIC

In Production: 28nm
Silicon Proven: 28nm

TSMC