Reinventing JTAG for SoC debugging

Want a headstart on implementing a new JTAG debug interface into your design? Here's the lowdown on the soon-to-be IEEE 1149.7 standard.

By Stephen Lau, Texas Instruments
Embedded.com (09/07/08, 12:00:00 PM EDT)

IEEE 1149.7 is a complementary superset of the widely adopted IEEE 1149.1 (JTAG) standard that has been in use for more than two decades. Although the new IEEE 1149.7 has not been finalized, its direction and its benefits to engineers--particularly those developing and debugging software for complex systems--are well defined.

IEEE 1149.7 was created with several goals in mind--to maintain backward compatibility with 1149.1 and improve debug performances. IEEE 1149.7 also reduces System-on-Chip (SoC) pin-count requirements and provides standardized power-saving operating conditions. While IEEE 1149.7 adds substantial functionality to the existing standard, it's important to note that IEEE 1149.7 isn't a replacement for IEEE 1149.1. Backward compatibility is maintained so that any board or system that integrates chips that support either standard is amenable to test or debug procedures.

Benefits
The new standard offers designers several benefits, including:

The ability to control debug-logic power consumption in an industry standard way. Whereas IEEE 1149.1 had a single "always on" state, IEEE 1149.7 offers four selectable power modes to enable ultra-low-power devices.

The ability to quickly access a specific device in a system with multiple devices. By implementing a system level bypass, the scan chain is drastically shorter, which directly improves the debugging experience.

The introduction of a star topology to complement the standard serial topology. Designers working with stacked-die devices, multi-chip modules and plug-in cards will favor the star topology because it simplifies the physical interdevice connections.

Two-pin operation in addition to the four-pin operation required in IEEE 1149.1. Since most of today's systems integrate multiple ICs and have severe size constraints, reducing the number of pins and traces will help designers meet their form factor goals and allowing for additional functional pins and/or low package cost. Background Data transfers (BDX) provide an industry-standard method for sending instrumentation data. Instrumentation information was previously implemented in vendor-specific methods, making tools support difficult. Standardization will provide users with a greater selection of products.

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