DDR IP

Compare 613 DDR IP from 35 vendors (1 - 10)

TSMC CLN4P 4nm DDR5 PHY - 6400Mbps
- Supports DDR5
- DFI 5.1 compliant
- Supports x4, x8 and x16 DRAMs
- Up to 72 bits wide and up to 4 ranks
LPDDR5X DDR Memory Controller
- JEDEC LPDDR5X/LPDDR5 devices compatible
- Data rates up to 8533Mbps
- Multiple ARM AMBA AXI4/AHB/APB & Custom interfaces
DDR4/3, LPDDR5x/5/4x/4 Memory Controller IP
- Compliant with JEDEC standard for LPDDR5/4/3, DDR4/3
- DRAM rank of up to 4
- Lock-step-based controlling of multiple DRAM devices up to x64 DQ width
- Support for dynamic DRAM frequency scaling
LPDDR5X/5/4X/4 combo PHY at Samsung SF5A
- Compliant for JEDEC standards for LPDDR5X/5/4X/4 with PHY standards
- DFI 5.1 specification PHY Interface Compliant
- Support up to 4 ranks
- x16 and x32 channel support
High Performance DDR5/4/3 Memory Controller
- Compliant with AXI4 Specification
- Compliant with DFI 3.1 Specification
- Compliant with JEDEC DDR3, DDR3L, DDR4 and DDR5 standards
- Supports 64, 32, 16 and 8 bit Memory SDRAM for DDR3L, DDR4 and DDR5
ONFI 3.2 NV-DDR2 PHY in GDSII
- Compliant to ONFI revision 3.2 standard
- Supports NV-DDR2 mode of operation supporting up to 266MHz or 566MT/s
- Supports NV-DDR mode of operation supporting up to 100MHz
- Supports legacy Asynchronous devices operating from 10MHz to 50MHz
LPDDR5/4x/4 combo PHY on 14nm, 12nm
- JESD209-5A(LPDDR5), JESD209-4C(LPDDR4), JESD209-4-1(LPDDR4X) compliant
- Operating speed up to 6400Mbps in LPDDR5, 4266Mbps in LPDDR4X
- Multiple DFICLK : CK :WCK ratios
LPDDR5X/5/4X/4 Memory Controller IP
- Intensive DRAM Utilization
- Ultra Low Power Consumption
- Extremely Low Latency
- Safety & Security
LPDDR5X/5/4X/4 combo PHY at 12nm
- Compliant with JEDEC JESD209-5C for LPDDR5x/5/4x/4 with PHY standards
- Delivering up to 8533Mbps
- DFI 5.1 specification PHY Interface Compliant
- Support up to 4 ranks
LPDDR5X/5/4X/4 PHY for 16nm
- Compliant with JEDEC standards for LPDDR5/4x/4 with PHY standards
- DFI 5.0 Interface Compliant
- Supports up to 4 ranks