A Monopoly in High-Level Synthesis?

By _FPGA Gurus

February 2, 2011

OK, the headline made you look – I admit it would be hard for an FPGA vendor to claim a special corner on synthesis or behavioral simulation, when there are companies like Mentor Graphics Corp., Cadence Design Systems Inc., and Synopsys Inc. around.  Nevertheless, Xilinx Inc.’s Jan. 31 acquisition of the young EDA company AutoESL Design Technologies Inc. could give Xilinx a special edge in the synthesis of complex designs as it moves to the complex Xilinx-7 families.

The ESL in the AutoESL name refers to “Electronic System Level”, and it’s a given that all interesting design intra-chip and inter-chip takes place at the block level of system design.  This strategy expands to true board-level or system-level tools, like the Altium suite introduced on Jan. 31.  In the deep submicron realm, design rarely moves below the level of Register-Transfer Level, or RTL, synthesis.

To read the full article, click here