Optimizing ARM SoCs through Core, Memory, Power and Process Improvements
November 16, 2010
ARM sponsored a session at the ARM Technology Conference (Techcon) this year to discuss critical implementation issues for SoC design ranging from high performance ARM processors, SRAM design, SOI, Power and Noise analysis, DFT and BIST, among others. The session featured speakers from ARM, Apache, IBM and Mentor. This aligned with the newly restructured Techcon where the first day focused around silicon design and implementation. It was a fantastic session, of which I had the honor of serving as session chair. The talks were standing room only, with people out the door in a number of cases.
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