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Crypto Accelerator IP for TSMC

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Compare 28 Crypto Accelerator IP for TSMC from 6 vendors (1 - 10)
  • Poly1305 Crypto Accelerator
    • Wide bus interface (128-bit data, 128-bit keys, 135-bit digest) or 32-bit register interface
    • Key size: 128 bits
    • Includes initialization stage
    • Supports continuation mode
    • Fully synchronous design
    Block Diagram -- Poly1305 Crypto Accelerator
  • SHA-1, SHA-2, SHA-3 Hash based HMAC, accelerators
    • HMAC-IP-59 (EIP-59) is IP for accelerating the various single pass HMAC (FIPS-198-1) algorithms using secure hash integrity algorithms like MD5 (RFC1231), SHA-1 (FIPS-180-2), SHA-2 (FIPS-180-3/4) and SHA-3 (FIPS-202), up to 8 Gbps.
    • Designed for fast integration, low gate count and full transforms, the HMAC-IP-59 accelerators provide a reliable and cost-effective embedded IP solution that is easy to integrate into high-speed crypto pipelines.
    Block Diagram -- SHA-1, SHA-2, SHA-3 Hash based HMAC, accelerators
  • SHA-3, SHA-2, SHA-1, SM3, MD5, Hash Accelerators
    • The HASH-IP-57 (EIP-57) is IP for accelerating the various secure hash integrity algorithms like MD5 (RFC1231), SHA-1 (FIPS-180-2), SHA-2 (FIPS-180-3/4) and SHA-3 (FIPS-202), supporting the NIST MAC mode up to 6.4 Gbps @ 450MHz.
    • Designed for fast integration, low gate count and full transforms, the HASH-IP-57 accelerators provides a reliable and cost-effective embedded IP solution that is easy to integrate into high-speed crypto pipelines.
    Block Diagram -- SHA-3, SHA-2, SHA-1, SM3, MD5, Hash Accelerators
  • ARC4 Stream Cipher Accelerators
    • The ARC4-IP-44 (EIP-44) is IP for accelerating the ARC4 stream cipher algorithm (used for legacy SSL & IPsec) up to 5 Gbps @ 600MHz.
    • Designed for fast integration, low gate count and full transforms, the ARC4-IP-44 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high-speed crypto pipelines.
    Block Diagram -- ARC4 Stream Cipher Accelerators
  • ChaCha20 Accelerators
    • The ChaCha-IP-13 (EIP-13) is an IP solution for accelerating the ChaCha20 cipher algorithm (RFC7539), supporting the NIST CTR mode up to 12.8 Gbps @ 300MHz.
    • Designed for fast integration, low gate count and full transforms, the ChaCha-IP-13 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high-speed crypto pipelines.
    Block Diagram -- ChaCha20 Accelerators
  • 3GPP ZUC Accelerators
    • The ZUC-IP-48 (EIP-48) cipher accelerators implement the specification of the 3GPP Confidentiality and Integrity Algorithms as specified by 3GPP and ETSI.
    • Designed for fast integration, low gate count and full transforms, the ZUC-IP-48 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed SoCs for base stations or other equipment requiring 3GPP support.
    Block Diagram -- 3GPP ZUC Accelerators
  • 3GPP SNOW 3G Accelerators
    • The SNOW-IP-46 (EIP-46) cipher accelerators implement the specification of the 3GPP Confidentiality and Integrity Algorithms as specified by 3GPP and ETSI.
    • Designed for fast integration, low gate count and full transforms, the SNOW-IP-46 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed SoCs for base stations or other equipment requiring 3GPP support.
    Block Diagram -- 3GPP SNOW 3G Accelerators
  • 3GPP Kasumi Accelerators
    • Wide bus interface (64-bit data, 128-bit keys) or 32-bit register interface.
    • Includes key scheduling hardware.
    • Modes Kasumi
    • Algorithms f8 and f9.
    • Fully synchronous design.
    • Low Speed, High Speed versions.
    Block Diagram -- 3GPP Kasumi Accelerators
  • High speed low latency AES-GCM pipeline, 100Gbps
    • The AES-IP-61 (EIP-61) is IP for accelerating AES-GCM based cryptographic solutions.
    • Designed for easy integration and very high performance the AES-IP-61 crypto accelerator provide a reliable and cost-effective embedded IP solution that is easy to integrate into high-speed processing pipelines.
    Block Diagram -- High speed low latency AES-GCM pipeline, 100Gbps
  • AES “All Modes” Accelerators
    • The AES-IP-39 (EIP-39) is IP for accelerating the AES symmetric cipher algorithm (FIPS-197), supporting all NIST modes including ECB, CBC, CTR, CFB, OFB, CCM, GCM, CBC-MAC, CMAC, XTS, F8, F9 modes of operation up to 6.4 Gbps @ 1GHz.
    • Designed for fast integration, low gate count and full transforms, the AES-IP-39 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into security modules needing versatile crypto.
    Block Diagram -- AES “All Modes” Accelerators
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