PHY IP: the last frontier of configurability?
An IP announcement by LSI last week highlights several key issues in the design of a modern serial interface PHY. The block, the PHY 9500, is the fast serial interface member of a complete library of critical IP blocks for implementing mass storage controller SoCs, the TrueStore family. The PHY 9500 supports SATA 6G, SAS 6G, and Fibre Channel 4.25G interfaces from one block.
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