Price for a new SATA I/O $700M. A complete AMS verification? Priceless!
The big news of the morning was that Intel has discovered a “design error” in a 65nm support chip for their new Sandy Bridge based systems, affecting the SATA disk-drive I/O controller.
“The chipset is utilized in PCs with Intel’s latest Second Generation Intel Core processors, code-named Sandy Bridge. Intel has stopped shipment of the affected support chip from its factories.”
Apparently the problem is not “functional“, and is due to “degradation” of performance that was discovered post-silicon during the company’s “ongoing QA“. In their update conference call, Intel said the root cause was due to “a design oversight“, and could be fixed in one of the “later layers of metal“.
Related Semiconductor IP
- 1-port Receiver or Transmitter HDCP 2.3 on HDMI 2.1 ESM
- HDMI 2.0/MHL RX Combo 1P PHY 6Gbps in TSMC 28nm HPC 1.8V, North/South Poly Orientation
- HDMI 2.0 RX PHY in SS 8LPP 1.8V, North/South Poly Orientation
- HDMI 2.0 RX Controller with HDCP
- HDMI 2.0 RX 4P PHY 6Gbps in TSMC 28nm HPM 1.8V, North/South Poly Orientation
Related Blogs
- ARM IP and Intel Custom Foundry collaboration: A new era for premium mobile design
- Verification of the Lane Adapter FSM of a USB4 Router Design Is Not Simple
- Verification of Light Weight Forward Error Correction (FEC) and Strong Cyclic Redundancy Checks (CRC) feature in PCIe 6.0
- 4 Ways that Digital Techniques Can Speed Up Memory Design and Verification
Latest Blogs
- Scaling Out Deep Learning (DL) Inference and Training: Addressing Bottlenecks with Storage, Networking with RISC-V CPUs
- Cadence Transforms Chiplet Technology with First Arm-Based System Chiplet
- Redefining XPU Memory for AI Data Centers Through Custom HBM4 – Part 2
- Redefining XPU Memory for AI Data Centers Through Custom HBM4 – Part 1
- Why Choose Hard IP for Embedded FPGA in Aerospace and Defense Applications