DAC retrospective
So what was the theme of DAC this year? Two things stood out for me: one is that the big EDA companies are getting serious about doing design at a higher level. I think we need a new name for this since ESL tends to focus on IC design, whereas the underlying message is that moving to the higher level is about designing electronic systems including their software, not largely about chip design.Mentor has had a portfolio in this area for years. Synopsys has been vacuuming up companies at this level: VaST, CoWare, Synfora, Virage.
Cadence has put their EDA360 stake in the ground and also acquired Denali. I think the price is insane. John Bruggeman asked me whether I thought Virage or Denali was the better buy and I had to say Virage. I find it hard to believe that there is a huge untapped reservoir of demand for Denali’s products that the Cadence sales-force will unlock whereas I think the Virage product line can be leveraged by the Synopsys salesforce, especially given the rest of their IP portfolio. The interesting thing about the Virage acquisition is what, if anything, it does to affect their relationship with ARM since it now puts them squarely in competition with ARM for the old Artisan part of their product line, and, with ARC, at least obliquely in competition with them in the microprocessor space. But they both need each other so they probably just have to live with it.
Related Semiconductor IP
- AES GCM IP Core
- High Speed Ethernet Quad 10G to 100G PCS
- High Speed Ethernet Gen-2 Quad 100G PCS IP
- High Speed Ethernet 4/2/1-Lane 100G PCS
- High Speed Ethernet 2/4/8-Lane 200G/400G PCS
Related Blogs
- Synopsys tunes back-end tools for DAC
- Heard at DAC: another try at embedded FPGA IP for SoCs
- Heard at DAC: Management panel debates how to organize a global design team
- DAC 47th digest: what you missed (even if you were there)
Latest Blogs
- Why Choose Hard IP for Embedded FPGA in Aerospace and Defense Applications
- Migrating the CPU IP Development from MIPS to RISC-V Instruction Set Architecture
- Quintauris: Accelerating RISC-V Innovation for next-gen Hardware
- Say Goodbye to Limits and Hello to Freedom of Scalability in the MIPS P8700
- Why is Hard IP a Better Solution for Embedded FPGA (eFPGA) Technology?