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MIPI PHY IP for GLOBALFOUNDRIES

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Compare 13 MIPI PHY IP for GLOBALFOUNDRIES from 3 vendors (1 - 10)
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  • 12nm
  • MIPI D-PHY Tx 4 Lanes - GF12LP18, North/South Poly Orientation
    • Compliant with the MIPI D-PHY specification, v1.2
    • Fully integrated hard macro
    • Up to 2.5 Gbps per lane
    • Aggregate throughput up to 10 Gbps in 4 data lanes
    Block Diagram -- MIPI D-PHY Tx 4 Lanes - GF12LP18, North/South Poly Orientation
  • MIPI D-PHY Rx 4 Lanes - GF12LP18, North/South Poly Orientation
    • Compliant with the MIPI D-PHY specification, v1.2
    • Fully integrated hard macro
    • Up to 2.5 Gbps per lane
    • Aggregate throughput up to 10 Gbps in 4 data lanes
    Block Diagram -- MIPI D-PHY Rx 4 Lanes - GF12LP18, North/South Poly Orientation
  • Globalfoundries 12nm MIPI D-PHY V1.2@2.5GHz
    • Compliant to MIPI Alliance Standard for D-PHY specification Version 1.1
    • Supports standard PHY transceiver compliant to MIPI Specification
  • MIPI M-PHY G4 Type 1 2TX2RX in GF (12nm)
    • Compliant with either the MIPI M-PHY v5.0 or MIPI M-PHY v4.1 specification as M-PHY Type-I
    • Supports MIPI UniPro, JEDEC UFS protocols
    • Supports High-Speed (HS) Gear1, Gear2, Gear3, Gear4 and Gear5 4 A/B modes
    • Low-speed Pulse-Width Modulation (PWM) Gear1 to Gear5 in Type-I LS implementation
  • MIPI D-PHY Tx-Only 4 Lanes in GF (12nm)
    • Compliant with the MIPI D-PHY specification
    • Fully verified hard macro
    • Up to 2.5 Gb/s per lane
    • Aggregate throughput up to 10 Gb/s in 4 data lanes
  • MIPI D-PHY Rx-Only 4 Lanes in GF (28nm, 12nm)
    • Compliant with the MIPI D-PHY specification
    • Fully verified hard macro
    • Up to 2.5 Gb/s per lane
    • Aggregate throughput up to 10 Gb/s in 4 data lanes
  • MIPI DPHY2.0/CPHY1.1 TX (support combo TTL, LVDS, HiSPI)
    • Analog mixed-signal hard-macro HS/LP transmitter solution
    • Compliant with MIPI® Alliance Specification for D-PHY V1.2
    • Compliant with MIPI® Alliance Specification for C-PHY V1.1
    • Integrated PHY Protocol Interface (PPI) supports interfaces to CSI, DSI and UniPro™ MIPI® protocols
  • MIPI D-PHY DSI TX IP
    • Compliant with MIPI® Alliance Specification for Display Serial Interface (DSI) V1.2
    • Compliant with MIPI® Alliance Standard for Display Bus Interface (DBI) V2.0
    • Compliant with MIPI® Alliance Standard for Display Pixel Interface (DPI) V2.0
    • Compliant with MIPI® Alliance Specification for D-PHY V1.2
  • MIPI M-PHY TX/RX + Controller
    • Compliant with MIPI Alliance Standard for MIPI M-PHY V4.1 Specifications
    • Supports standard RMMI interface compliant to M-PHY Specifications
    • Supports HS Mode (GEAR1~4, A/B)
    • Supports data rate up to 11.6608Gbps per lane
  • MIPI C/D-PHY TX
    • Analog mixed-signal hard-macro HS/LP transmitter solution
    • Compliant with MIPI® Alliance Specification for D-PHY V1.2
    • Compliant with MIPI® Alliance Specification for C-PHY V1.1
    • Integrated PHY Protocol Interface (PPI) supports interfaces to CSI, DSI and UniPro™ MIPI® protocols
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