MIPI DPHY1.2 RX (support combo TTL, LVDS, HiSPI)

Overview

The Innosilicon MIPI D-PHY IP provides D-PHY in a single IP core. It integrates a compatible PHY that supports high speed data receiver, plus a MIPI® low-power low speed receiver that supports data transfer in the bi-directional mode.
The D-PHY is built in with a standard PPI digital interface to talk to any third-party Host controller.
This enables a seamless implementation allowing interface to D-PHY based sensors. The Innosilicon I/O and ESD are also built-in as one in a rectangular footprint. It is optimized for High-speed applications with robust timing and small silicon area.
The D-PHY supports the electrical portion of MIPI D-PHY V1.2 Standard, covering all transmission modes (ULP/LP/HS). This IP cost-effectively adds MIPI D-PHY capability to any SOC used in communication and consumer electronics field.

Key Features

  • Analog mixed-signal hard-macro LP/HS Receiver solution
  • Compliant with MIPI Alliance Standard for D-PHY Specifications V1.2
  • Integrated PHY Protocol Interface (PPI) supports interfaces to CSI, DSI and UniPro™ MIPI® protocols
  • HS, LP and ULPS modes supported
  • 2.5Gbps maximum data transfer rate per lane on D-PHY mode
  • Asynchronous transfer at low power mode with a bit rate of 10Mbps in D-PHY supported
  • Unidirectional and bi-directional mode supported
  • Auto/Manual-deskew supported
  • ECC and CRC insertion supported
  • Automatic termination control for HS and LP modes
  • Low-Power dissipation: less than 2mA/Lane in D-PHY HS RX mode
  • Buffers with tunable On-Die-Termination
  • Embedded bump pad
  • Support PHY BIST logic

Deliverables

  • Databook and physical implementation guides Netlist (Spice format for LVS)
  • Library Exchange Format (LEF)
  • Encrypted Verilog Models
  • GDSII to Foundry IP Merge
  • Module integration guidelines
  • Silicon validation report (when available)
  • Evaluation board (when available)

Technical Specifications

Foundry, Node
GF22nm, TSMC 28nm
GLOBALFOUNDRIES
Silicon Proven: 22nm FDX
TSMC
Pre-Silicon: 28nm HPC , 28nm HPCP , 28nm HPM
×
Semiconductor IP